Memory circuits used for data storage are used in a large variety of consumer electronics, such as computers and cellular telephones. Data cells in a memory circuit, such as a static random access memory (SRAM), are typically arranged in an array, such that the memory array includes individually addressable rows and columns to which data can be written and from which data can be read. The individually addressable rows and columns are controlled by peripheral circuitry that receives decoded signals corresponding to memory locations, which could be generated from a processor, such that the peripheral circuitry determines which of the data cells in the array are written to and read from at any given time. While data is being transferred to and from a memory array, the memory array is considered to be in an activation mode, such that all of the data cells in the array are receiving power and are capable of freely allowing data transfer to and from the data cells.
The market for consumer electronics, however, is constantly improving. There is an increasing demand for smaller circuit packages that consume less power for the purpose of conserving battery-life, such as in wireless communication applications. One attempt to achieve reduced power consumption is to switch the memory array from an active mode to a retention mode of operation at times when data is not being written to or read from the memory array. To retain the data written into the memory array, the memory array needs a continuous power supply. In the retention mode of operation, power is continuously supplied to the memory array, but the power supplied to the memory array is reduced, such as by switching the power supplied to the memory array to a lower, preset voltage. Switching to a lower, preset voltage can thus result in reduced power consumption in the form of leakage current. However, excess power consumption due to leakage current becomes particularly problematic as gate-oxide sizes in transistors within the memory array shrink (e.g., 70 nm or smaller), even when the memory array is in the retention mode.